ELEMENTS OF BUS DESIGNS ~ COMPUTER ARCHITECTURE

1) Bus Types
2) Method of Arbitration
3) Timing
4) Bus Width
5) Data Transfer Type
6) Block Data Transfer

A) Dedicated

A line is permanently assigned either to one function.
An example of functional dedication is the use of separate dedicated address and data line.

B) Multiplexed

Using the same lines for multiple purpose.
Eg:- Address and data information may be transmitted over the same set of lines.
At the beginning of the data transfer the address is placed on the bus and the address valid line is activated.
The address is then remove from the same bus line is used for data transfer.

C) Physical Dedication

A) Centralized

A single hardware device called the bus controller or arbiter allocate time on the bus.
The device may be a separate or a part of a processor.

B) Distributed

A) Synchronous Timing

Bus includes a clock line upon which a clock transmits a regular sequence of alternating 1's and 0's
A single 1-0 transition is referred to as a clock cycle or bus cycle.
All other devices on the bus can read the clock line.
All events start at the beginning of a clock cycle

B) Asynchronous Timing

The occurrence of one event on abus follows and depends on the occurrence of a previous event.
Harder to implement and text than synchronous timing.

4) Bus Width

The width of data bus has an impact on the databus has an impact on the system performance.
The wider data bus, the greater number of bit transferred at one time.
The wider address bus, the greater range of location that can be referenced.

5) Data Transfer Type

Read-Modify-Write : A read followed immediately by a write to the same address.
Read-After-Write : Consisting of a write followed immediately by a read from the same address (for error checking purposes).

6) Block Data Transfer