MULTIPLE BUS HIERARCHIES


  • A great number of devices on a bus will cause performance to suffer.
  • Propagation delay : The time it takes for devices to coordinate the use of the bus.
  • The bus may become a bottleneck as the aggregate data transfer demand approaches the capacity of the bus.

1)Traditional Hierarchi Bus Architecture

  • Use of a cache structure insulates CPU from frequent accesses to main memory.
  • Main memory can be moved off local bus t a system bus.
  • Expansion bus interface buffers data transfers between system bus and I/O controllers on expansion. 







2) High-Performance Hierarchical Bus Architecture 

  • Incorporates a high-speed bus specifically designed to support high-capacity I/O devices. 
  • Bring high-demand devices into closer integration with processor.












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